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 PF754-03
SCI7654M0A/C0A
DC/DC Converter
Double/Triple/Quadruple Boosting 95% Excellent Power Conversion Efficiency Built-in Voltage Regulator DESCRIPTION
The SCI7654 is a highly efficient, but low power-consumption DC-to-DC converter based on the advanced CMOS technologies. It can generate an output voltage double/triple/quadruple times higher than the input (in negative direction) if 4/3/2 external capacitors are attached. With a built-in voltage regulator, the SCI7654 can provide a stable output by setting the DC/DC output to any voltage via two external resistors. This is optimum to the LCD panel power supply as the stable output can have the negative temperature gradient required for an LCD panel.
FEATURES
An input voltage can be boosted double/triple/quadruple to negative potential. Input voltages: -2.4 to -5.5V (quadruple boosting), -2.4 to -7.3V (triple boosting), -2.4 to -11.0V (double boosting) Excellent vol tage conversion efficiency: 95% (Typ.) Large output current: 20 mA (Max.) during quadruple boosting Built-in voltage regulator (for stable voltage output) Built-in reference voltage source for accurate regulation: -1.5 0.05V (CT0) Regulator output voltage temperature gradient function: -0.04, -0.15, -0.35, -0.55%/C Low current consumption: 130 A (Typ.) Low standby current: 5.0 A (Max.) Built-in oscillator circuit 5/6-time voltage boosting in negative potential by serial connection Package: SCI7654M0A SSOP2-16pin (plastic), SCI7654C0A DIP-16pin (plastic)
BLOCK DIAGRAM
VDD POFF1 POFF2 Power-Off Control Ref. Voltage Circuit TC1 TC2
FC
Clock Generator
Booster Control Voltage Regulator
RV VREG VRI
VIN
Voltage Converter
VOUT
C1P
C1N
C3N
C2P
C2N
SCI7654M0A/C0A
PIN CONFIGURATION
SSOP2-16pin/DIP-16pin
VOUT VRI VREG RV VDD FC TC1 TC2
1 2 3 4 5 6 7 8
16 C2P 15 C2N 14 C3N 13 C1N 12 C1P 11 VIN 10 POFF1 9 POFF2
PIN DESCRIPTION
Pin No. 1 2 3 4 5 6 Pin Name VOUT VRI VREG RV VDD FC Voltage output Regulator input Regulator output Input for regulator output voltage adjustment Input voltage pin (Positive) Internal clock rate switch input, and clock input in serial/parallel connection (Common input pin) 7 8 9 10 11 12 13 14 15 16 TC1 TC2 POFF2 POFF1 VIN C1P C1N C3N C2N C2P Input for regulator output temperature gradient setup (1) Input for regulator output temperature gradient setup (2) Power-off control input (2) Power-off control input (1) Input voltage pin (Negative) Common double and quadruple boosting capacitor positive pin Double boosting capacitor negative pin Quadruple boosting capacitor negative pin Triple boosting capacitor negative pin Triple boosting capacitor positive pin Function
2
SCI7654M0A/C0A
ABSOLUTE MAXIMUM RATINGS
Rating Input Power Voltage Input Pin Voltage Output Pin Voltage 1 Output Pin Voltage 2 Output Pin Voltage 3 Output Pin Voltage 4 Regulator Input Power Voltage Regulator Input Pin Voltage Output Voltage Input Current Output Current Allowable Loss Operating Temperature Storage Temperature Soldering Temperature and Time Symbol VIN VI V0C1 VOC2 VOC3 VOC4 VRI VRV V0 IIN IOUT Pd Topr Tstg Tsol 2 3 4 N N N Min. -26.0/N VIN -0.3 VIN -0.3 VIN -0.3 VIN -0.3 VIN -0.3 VIN -0.3 VIN -0.3 VIN -0.3 -- -- -- -30 -55 -- Max. VDD +0.3 VDD +0.3 VDD +0.3 VIN +0.3 2 VIN +0.3 3 VIN +0.3 VDD +0.3 VDD +0.3 VDD +0.3 80 N4: 20 N>4: 80/N 210 85 150 260*10 Unit V V V V V V V V V mA mA mW C C C.S Remark N=Boosting time; at VIN pin POFF1, POFF2 TC1, TC2, FC pins At C1P and C2P pins At C1N pin At C2N pin At C3N pin N=Boosting time; at VRI pin N=Boosting time; at RV pin N=Boosting time; at VOUT and VREG pins At VIN pin N=Boosting time; at VOUT and VREG pins -- -- -- Temperature at leads
ELECTRICAL CHARACTERISTICS
(Unless otherwise designated: Ta=-30V to +85C, VDD=0V, VIN=-5.0V)
Characteristic Input Power Voltage 1 Input Power Voltage 2 Input Power Voltage 3 Input Power Voltage N Boost Startup Input Power Voltage Booster Output Voltage Regulator Input Voltage Regulator Output Voltage Booster Output Impedance Booster Power Conversion Efficiency Booster Operating Current Consumption 1 Booster Operating Current Consumption 2 Regulator Operating Current Consumption Symbol VIN1 VIN2 VIN3 VINN VSTA VOUT VRI VREG ROUT Peff Condition During quadruple boosting During triple boosting During double boosting During large-time boosting using external diodes N=Boosting time, IOUT<200 FC=VDD -- A, Min. -5.5 -7.3 -11 -22/N -22/N -22 -22 -- -- -- Typ. -- -- -- -- -- -- -- 200 95 Max. -2.4 -2.4 -2.4 -2.4 -2.4 -- -2.4 -2.4 300 -- % Unit V V V V V V V V
IOPR1
IOPR2
IOPVR
-- IREG=0, VRI=-22V, RRV=1M IOUT=10mA, during quadruple boosting IOUT=2 mA; during quadruple boosting; C1, C2, C3, COUT=10 F Tantalum FC=VDD, POFF1=VIN, POFF2=VDD; during no loading; C1, C2, C3, COUT=10 F Tantalum FC=VIN, POFF1=VIN, POFF2=VDD; during no loading; C1, C2, C3, COUT=10 F Tantalum VRI=-20 V, during no loading, RRV=1 M
--
130
220
A
--
520
880
A
--
10
15
A
3
SCI7654M0A/C0A
ELECTRICAL CHARACTERISTICS (continued)
Characteristic Static Current Input Leakage Current Stable Output Saturation Resistance Stable Output Voltage Stability Symbol IQ ILIN RSAT (*1) DVR (*2) DV0 (*3) VREF0 VREF1 VREF2 VREF3 Reference Voltage Temperature Coefficient (*4) (*5) CT0 CT1 CT2 CT3 VIH Condition POFF1=VIN, POFF2=VIN, FC=VDD At POFF1, POFF2, FC, TC1, TC2 pins 0--
0.2
--
%/V
Stable Output Load Variation
Reference Voltage (Ta = 25C)
-1.55 -1.70 -1.90 -2.15 -0.07 -0.25 -0.45 -0.75 0.2VIN
-1.50 -1.50 -1.50 -1.50 -0.04 -0.15 -0.35 -0.55 --
-1.45 -1.30 -1.10 -0.85 0 -0.07 -0.20 -0.30 --
V V V V %/C %/C %/C %/C V
Input Voltage Level
VIL
-- --
-- --
0.8VIN 47
V F
Capacitance of Booster Capacitors
CMAX
(*1) RSAT = (*2) VR (*3) R0 (*4) CT = = =
(VREG - VOUT) IREG VREG VOUT*VREG VREG IREG |VREF(50C)| - |VREF(0C)| 50C - 0C 100 |VREF(25C)|
(*5) The reference voltage temperature coefficient of each chip product may vary depending on the used molding materials. Perform the temperature test before use.
4
SCI7654M0A/C0A
FUNCTIONAL DESCRIPTION
Clock Generator Circuit As the SCI7654 has a built-in clock generator circuit, it requires no external source at all. The clock rate changes depending on the FC pin signal level, and the Low Output or High Output mode can be selected. This allows a frequency selection according to the current capacitance and load current when the booster output impedance changes depending on the clock rate and external booster capacitance. FC pin H (VDD) L (VIN) Mode Low Output High Output Clock Rate 4.0 kHz (Typ.) 16.0 kHz (Typ.) Current Consumption IOP Approx. 4 times of IOP Output Ripple VRP Approx. 1/4 time of VRI
Voltage Converter Circuit The voltage converter receives a clock from the clock generator, and boosts the VIN input power voltage quadruple, triple or double. Four converter circuits are required for quadruple boosting, three converts are required for triple boosting, and dual converters are required for double boosting.
VDD (0V) VIN (-5V) -10V 15V triple boosting 20V -20V quadruple boosting -15V
10V double boosting
Voltage step-up diagram (during -5V input)
Reference Voltage Circuit The SCI7654 has a built-in reference voltage circuit for the voltage regulator. The temperature coefficient of reference voltage can be changed using pins TC1 and TC2, and a voltage having one of four types of temperature gradients can be output at VREG pin for LCD driving. Reference Voltage, VREF (V) Min. -1.55 -1.70 -1.90 -2.15 Typ. -1.5 -1.5 -1.5 -1.5 Max. -1.45 -1.30 -1.10 -0.85 Temperature Coefficient, CT (%/C) Min. -0.07 -0.25 -0.45 -0.75 Typ. -0.04 -0.15 -0.35 -0.55 Max. 0 -0.07 -0.20 -0.30
Mode CT0 CT1 CT2 CT3
TC1 H(VDD) H L(VIN) L
TC2 H(VDD) L(VIN) H L
5
SCI7654M0A/C0A
Voltage Regulator Circuit The circuit receives a voltage from VRI pin, stabilizes it, and outputs at any voltage. The output is adjustable with a ratio of R1 and R2 external divider resistors. Although the sum of divider resistors is desirable to be minimum to prevent an interference due to external noise, 100 to 1 megohms are recommended as the current consumption may be increased by the divider resistors.
R1
R2
1 VOUT 2 VRI 3 VREG 4 RV 5 VDD 6 FC 7 TC1 8 TC2
C2P 16 C2N 15 C3N 14 C1N 13 C1P 12 VIN 11 POFF1 10 POFF2 9
Power Off Control The SCI7654 has an automatic power-off function, and can turn on or off each function depending on the external signals entered in POFF1 and POFF2 pins. POFF1 H(VDD) L H POFF2 L(VIN) L H Function Status Oscillator ON OFF OFF Booster ON OFF (*1) ON Regulator ON OFF (*2) ON Description All circuits are turned ON. All circuits are turned OFF. Slave side (booster and regulator) in parallel connection Master side (for booster only) PS4 L H ON ON OFF in parallel connection; first stage in serial connection (*3) *1 When the booster circuit is OFF, approximately VIN +0.6V voltage appears at VOUT pin. *2 When the regulator is OFF, the VREG pin is set to the high-impedance status. *3 The mode selected depends on the line connection at the second stage of serial connection.
Mode PS1 PS2 PS3
6
SCI7654M0A/C0A
REFERENCE CIRCUIT EXAMPLE
Four-time booster circuit This example drives the booster circuit only, boosts the VIN input voltage four times in negative direction, and outputs it at the VOUT pin. However, this does not have a voltage regulator and the voltage at VOUT pin may have a ripple.
COUT + 1 VOUT VOUT 2 VRI 3 VREG 4 RV VDD 5 VDD 6 FC + CIN 7 TC1 8 TC2 C2P 16 C2N 15 C3N 14 C1N 13 C1P 12 VIN 11 POFF1 10 POFF2 9 C1 + + C2 C3 +
VIN
Four-time booster and regulator circuits This example receives a boost output from VOUT pin, stabilizes it via the voltage regulator circuit, and outputs a voltage having the temperature gradient at VREG pin via the temperature gradient selector circuit.
COUT + VREG CREG R1 + R2 1 VOUT 2 VRI 3 VREG 4 RV VDD 5 VDD 6 FC + CIN 7 TC1 8 TC2 C2P 16 C2N 15 C3N 14 C1N 13 C1P 12 VIN 11 POFF1 10 POFF2 9 C1 + + C2 C3 +
VIN
7
SCI7654M0A/C0A
PACKAGE DIMENSIONS
Plastic SSOP2-16pin
(0.275max) (0.26 -0.008 )
16 9
0.2 6.6+0.007
7max
(0.173 -0.007 )
INDEX
(0.2440.011)
4.40.2 +0.008
6.20.3
0 10 1 8
(0.0590.003)
(0.066max)
1.50.1
1.7max
(0.006 -0.002 )
0.05
0.150.05 +0.003
(0.031)
0.8
(0.002)
(0.014 -0.003 )
0.1 0.36+0.004
(0.02 -0.008 ) (0.035) Unit : mm (inch)
0.9
0.2 0.5+0.007
8
SCI7654M0A/C0A
Plastic DIP-16pin
19.7max 190.1
(0.775max) (0.7480.003)
16 9
1
8
(0.119min) (0.173 -0.003 )
(0.031 -0.003 )
(0.059)
4.40.1 +0.004
1.5
0.80.1 +0.004
(0.2480.003)
6.30.1
3min
(0.1)
2.54
(0.018 -0.003 )
0.1 0.46+0.004
0 15
(0.3)
Unit : mm (inch)
7.62
0.25 -0 .001 +0 ) (0.01 -0
+0.03 .01
9
NOTICE: No part of this material may be reproduced or duplicated in any form or by any means without the written permission of Seiko Epson. Seiko Epson reserves the right to make changes to this material without notice. Seiko Epson does not assume any liability of any kind arising out of any inaccuracies contained in this material or due to its application or use in any product or circuit and, further, there is no representation that this material is applicable to products requiring high level reliability, such as, medical products. Moreover, no license to any intellectual property rights is granted by implication or otherwise, and there is no representation or warranty that anything made in accordance with this material will be free from any patent or copyright infringement of a third party. This material or portions thereof may contain technology or the subject relating to strategic products under the control of the Foreign Exchange and Foreign Trade Law of Japan and may require an export license from the Ministry of International Trade and Industry or other approval from another government agency. (c) Seiko Epson Corporation 2000 All right reserved. All other product names mentioned herein are trademarks and/or registered trademarks of their respective companies.
ELECTRONIC DEVICES MARKETING DIVISION
IC Marketing & Engineering Group ED International Marketing Department I (Europe & U.S.A.) 421-8, Hino, Hino-shi, Tokyo 191-8501, JAPAN Phone : +81-(0)42-587-5812 FAX : +81-(0)42-587-5564 ED International Marketing Department II (Asia) 421-8, Hino, Hino-shi, Tokyo 191-8501, JAPAN Phone : +81-(0)42-587-5814 FAX : +81-(0)42-587-5110
s EPSON Electronic Devices Website
http://www.epson.co.jp/device/
First issue June, 1995 Printed February, 2000 in Japan T


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